1. Field
Example embodiments relate to wiring structures, methods of manufacturing wiring structures, and/or methods of manufacturing semiconductor devices.
2. Description of the Related Art
Recently, as the integration degree of a semiconductor device increases, a space between wirings, e.g., bit lines, has been decreased. Accordingly, a parasitic capacitance between the wirings has been increased, thereby degrading the electrical characteristics of the semiconductor device. As such, wirings structures and/or methods of manufacturing wiring structures to reduce the parasitic capacitance between the wirings are being actively researched.